The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs

W. K. Yeh; C. M. Lai; C. T. Lin; Y. K. Fang; H. H. Hu; K. M. Chen; G. W. Huang

doi:10.1109/EDSSC.2005.1635213

The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs

W. K. Yeh
, C. M. Lai
, C. T. Lin
, Y. K. Fang
, H. H. Hu
, K. M. Chen
, G. W. Huang

電子工程系

研究成果: 書籍/報告/會議論文中的章節 › 會議投稿 › 同行評審

摘要

For nMOSFET, utilizing the high tensile stress gate capping layer (GC layer) and length of diffusion (LOD) to control the tensile and compressive stress in channel regions were developed. In this work, in order to investigate the interactive stress effects of GC layer film thickness, LOD and gate width on device's characteristic and hot-carrier reliability; devices with various GC layer (1100A, 700A, SiN380), LOD (0.45μm-4.5μm) and width (0.18μm-10μm) were fabricated. It is found that devices with 700A GC layer layer (appropriate tensile stress), 4.5μm LOD (low compressive stress) and 0.18μm gate width (narrow width) possess the better performance.

原文	English
主出版物標題	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	91-94
頁數	4
ISBN（列印）	0780393392, 9780780393394
DOIs	https://doi.org/10.1109/EDSSC.2005.1635213
出版狀態	Published - 2005
事件	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC - Howloon, Hong Kong 持續時間: 19 12月 2005 → 21 12月 2005

出版系列

名字	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC

Conference

Conference	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
國家/地區	Hong Kong
城市	Howloon
期間	19/12/05 → 21/12/05

存取文件

10.1109/EDSSC.2005.1635213

其它文件與鏈接

Link to publication in Scopus

引用此

Yeh, W. K., Lai, C. M., Lin, C. T., Fang, Y. K., Hu, H. H., Chen, K. M., & Huang, G. W. (2005). The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs. 於 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC (頁 91-94). 文章 1635213 (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2005.1635213

Yeh, W. K. ; Lai, C. M. ; Lin, C. T. 等. / The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs. 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC. Institute of Electrical and Electronics Engineers Inc., 2005. 頁 91-94 (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC).

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title = "The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs",

abstract = "For nMOSFET, utilizing the high tensile stress gate capping layer (GC layer) and length of diffusion (LOD) to control the tensile and compressive stress in channel regions were developed. In this work, in order to investigate the interactive stress effects of GC layer film thickness, LOD and gate width on device's characteristic and hot-carrier reliability; devices with various GC layer (1100A, 700A, SiN380), LOD (0.45μm-4.5μm) and width (0.18μm-10μm) were fabricated. It is found that devices with 700A GC layer layer (appropriate tensile stress), 4.5μm LOD (low compressive stress) and 0.18μm gate width (narrow width) possess the better performance.",

author = "Yeh, \{W. K.\} and Lai, \{C. M.\} and Lin, \{C. T.\} and Fang, \{Y. K.\} and Hu, \{H. H.\} and Chen, \{K. M.\} and Huang, \{G. W.\}",

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Yeh, WK, Lai, CM, Lin, CT, Fang, YK, Hu, HH, Chen, KM & Huang, GW 2005, The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs. 於 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC., 1635213, 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC, Institute of Electrical and Electronics Engineers Inc., 頁 91-94, 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC, Howloon, Hong Kong, 19/12/05. https://doi.org/10.1109/EDSSC.2005.1635213

The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs. / Yeh, W. K.; Lai, C. M.; Lin, C. T. 等.
2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC. Institute of Electrical and Electronics Engineers Inc., 2005. p. 91-94 1635213 (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC).

研究成果: 書籍/報告/會議論文中的章節 › 會議投稿 › 同行評審

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T1 - The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs

AU - Yeh, W. K.

AU - Lai, C. M.

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AU - Fang, Y. K.

AU - Hu, H. H.

AU - Chen, K. M.

AU - Huang, G. W.

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AB - For nMOSFET, utilizing the high tensile stress gate capping layer (GC layer) and length of diffusion (LOD) to control the tensile and compressive stress in channel regions were developed. In this work, in order to investigate the interactive stress effects of GC layer film thickness, LOD and gate width on device's characteristic and hot-carrier reliability; devices with various GC layer (1100A, 700A, SiN380), LOD (0.45μm-4.5μm) and width (0.18μm-10μm) were fabricated. It is found that devices with 700A GC layer layer (appropriate tensile stress), 4.5μm LOD (low compressive stress) and 0.18μm gate width (narrow width) possess the better performance.

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Yeh WK, Lai CM, Lin CT, Fang YK, Hu HH, Chen KM 等. The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs. 於 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC. Institute of Electrical and Electronics Engineers Inc. 2005. p. 91-94. 1635213. (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC). doi: 10.1109/EDSSC.2005.1635213

The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs

摘要

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