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Dual-path frequency compensation for current-mode buck converters

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1 引文 斯高帕斯(Scopus)

摘要

This paper proposes a dual-path frequency compensation (DPFC) for implementing on-chip error amplifier (EA). The DPFC uses two operation amplifiers to simultaneously charge and discharge a compensation capacitor. As a result, the equivalent capacitance is significantly multiplied with small additional power and silicon area. Since the slew rate of the EA is increased owing to the small compensation capacitance, the transient response of the buck converter is also enhanced dramatically. A laboratory converter with the DPFC is implemented with 0.35-μm CMOS process. Simulation results demonstrate the converter stability and transient response. The transient recovery time is less than 4 μs for load current changing from 500 mA to 50 mA. With the DPFC, the compensation capacitor is shrunk significantly and no compensation resistor is needed.

原文English
主出版物標題2015 IEEE 11th International Conference on Power Electronics and Drive Systems, PEDS 2015
發行者Institute of Electrical and Electronics Engineers Inc.
頁面432-436
頁數5
ISBN(電子)9781479944033
DOIs
出版狀態Published - 14 8月 2015
事件11th IEEE International Conference on Power Electronics and Drive Systems, PEDS 2015 - Sydney, Australia
持續時間: 9 6月 201512 6月 2015

出版系列

名字Proceedings of the International Conference on Power Electronics and Drive Systems
2015-August

Conference

Conference11th IEEE International Conference on Power Electronics and Drive Systems, PEDS 2015
國家/地區Australia
城市Sydney
期間9/06/1512/06/15

文獻附註

Publisher Copyright:
© 2015 IEEE.

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