A K-band low-power colpitts VCO with voltage-to-current positive-feedback network in 0.18 μm CMOS

To Po Wang

doi:10.1109/LMWC.2011.2108275

A K-band low-power colpitts VCO with voltage-to-current positive-feedback network in 0.18 μm CMOS

To Po Wang

電子工程系

研究成果: 期刊貢獻 › 文章 › 同行評審

43 引文斯高帕斯（Scopus）

摘要

A circuit topology suitable for low-power Colpitts voltage-controlled oscillators (VCOs) is presented in this letter. By employing the proposed voltage-to-current positive-feedback network, the required transconductance for VCO startup can be reduced, leading to the minimized dc power for sustaining VCO oscillation. Moreover, the Q-factor enhanced varactor is used in this VCO design for phase noise improvement. Based on the proposed architecture, the fabricated VCO in standard 0.18 μ m CMOS exhibits a 3.58% tuning range. Operating at 1.35-V supply voltage, the VCO core consumes 3.3-mW dc power. The measured phase noise is -110.82 dBc/Hz at 1 MHz offset from 18.95 GHz oscillation frequency. Compared with the recently published K-band 0.18 μ m CMOS VCOs, it is observed that the proposed Colpitts VCO exhibits comparable circuit performance under low dc-power consumption.

原文	English
文章編號	5728878
頁（從 - 到）	218-220
頁數	3
期刊	IEEE Microwave and Wireless Components Letters
卷	21
發行號	4
DOIs	https://doi.org/10.1109/LMWC.2011.2108275
出版狀態	Published - 4月 2011

文獻附註

Funding Information:
Manuscript received August 07, 2010; revised November 26, 2010; accepted January 10, 2011. Date of publication March 10, 2011; date of current version April 08, 2011. This work was supported in part by the National Science Council of Taiwan under Contract NSC 98-2218-E-027-005, NSC 99-2622-E-027-031-CC3, and NDL 99-C07M2-056 and by the National Chip Implementation Center (CIC), Hsinchu, Taiwan, for chip fabrication, and the National Nano Device Laboratories (NDL), Hsinchu, Taiwan, for chip measurement.

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10.1109/LMWC.2011.2108275

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abstract = "A circuit topology suitable for low-power Colpitts voltage-controlled oscillators (VCOs) is presented in this letter. By employing the proposed voltage-to-current positive-feedback network, the required transconductance for VCO startup can be reduced, leading to the minimized dc power for sustaining VCO oscillation. Moreover, the Q-factor enhanced varactor is used in this VCO design for phase noise improvement. Based on the proposed architecture, the fabricated VCO in standard 0.18 μ m CMOS exhibits a 3.58\% tuning range. Operating at 1.35-V supply voltage, the VCO core consumes 3.3-mW dc power. The measured phase noise is -110.82 dBc/Hz at 1 MHz offset from 18.95 GHz oscillation frequency. Compared with the recently published K-band 0.18 μ m CMOS VCOs, it is observed that the proposed Colpitts VCO exhibits comparable circuit performance under low dc-power consumption.",

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A K-band low-power colpitts VCO with voltage-to-current positive-feedback network in 0.18 μm CMOS

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