The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs

W. K. Yeh; C. M. Lai; C. T. Lin; Y. K. Fang; H. H. Hu; K. M. Chen; G. W. Huang

doi:10.1109/EDSSC.2005.1635213

The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs

W. K. Yeh
, C. M. Lai
, C. T. Lin
, Y. K. Fang
, H. H. Hu
, K. M. Chen
, G. W. Huang

Department of Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

For nMOSFET, utilizing the high tensile stress gate capping layer (GC layer) and length of diffusion (LOD) to control the tensile and compressive stress in channel regions were developed. In this work, in order to investigate the interactive stress effects of GC layer film thickness, LOD and gate width on device's characteristic and hot-carrier reliability; devices with various GC layer (1100A, 700A, SiN380), LOD (0.45μm-4.5μm) and width (0.18μm-10μm) were fabricated. It is found that devices with 700A GC layer layer (appropriate tensile stress), 4.5μm LOD (low compressive stress) and 0.18μm gate width (narrow width) possess the better performance.

Original language	English
Title of host publication	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	91-94
Number of pages	4
ISBN (Print)	0780393392, 9780780393394
DOIs	https://doi.org/10.1109/EDSSC.2005.1635213
State	Published - 2005
Event	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC - Howloon, Hong Kong Duration: 19 Dec 2005 → 21 Dec 2005

Publication series

Name	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC

Conference

Conference	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
Country/Territory	Hong Kong
City	Howloon
Period	19/12/05 → 21/12/05

Access to Document

10.1109/EDSSC.2005.1635213

Cite this

Yeh, W. K., Lai, C. M., Lin, C. T., Fang, Y. K., Hu, H. H., Chen, K. M., & Huang, G. W. (2005). The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs. In 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC (pp. 91-94). Article 1635213 (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2005.1635213

Yeh, W. K. ; Lai, C. M. ; Lin, C. T. et al. / The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs. 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC. Institute of Electrical and Electronics Engineers Inc., 2005. pp. 91-94 (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC).

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title = "The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs",

abstract = "For nMOSFET, utilizing the high tensile stress gate capping layer (GC layer) and length of diffusion (LOD) to control the tensile and compressive stress in channel regions were developed. In this work, in order to investigate the interactive stress effects of GC layer film thickness, LOD and gate width on device's characteristic and hot-carrier reliability; devices with various GC layer (1100A, 700A, SiN380), LOD (0.45μm-4.5μm) and width (0.18μm-10μm) were fabricated. It is found that devices with 700A GC layer layer (appropriate tensile stress), 4.5μm LOD (low compressive stress) and 0.18μm gate width (narrow width) possess the better performance.",

author = "Yeh, \{W. K.\} and Lai, \{C. M.\} and Lin, \{C. T.\} and Fang, \{Y. K.\} and Hu, \{H. H.\} and Chen, \{K. M.\} and Huang, \{G. W.\}",

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publisher = "Institute of Electrical and Electronics Engineers Inc.",

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Yeh, WK, Lai, CM, Lin, CT, Fang, YK, Hu, HH, Chen, KM & Huang, GW 2005, The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs. in 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC., 1635213, 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC, Institute of Electrical and Electronics Engineers Inc., pp. 91-94, 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC, Howloon, Hong Kong, 19/12/05. https://doi.org/10.1109/EDSSC.2005.1635213

The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs. / Yeh, W. K.; Lai, C. M.; Lin, C. T. et al.
2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC. Institute of Electrical and Electronics Engineers Inc., 2005. p. 91-94 1635213 (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Huang, G. W.

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AB - For nMOSFET, utilizing the high tensile stress gate capping layer (GC layer) and length of diffusion (LOD) to control the tensile and compressive stress in channel regions were developed. In this work, in order to investigate the interactive stress effects of GC layer film thickness, LOD and gate width on device's characteristic and hot-carrier reliability; devices with various GC layer (1100A, 700A, SiN380), LOD (0.45μm-4.5μm) and width (0.18μm-10μm) were fabricated. It is found that devices with 700A GC layer layer (appropriate tensile stress), 4.5μm LOD (low compressive stress) and 0.18μm gate width (narrow width) possess the better performance.

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Yeh WK, Lai CM, Lin CT, Fang YK, Hu HH, Chen KM et al. The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs. In 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC. Institute of Electrical and Electronics Engineers Inc. 2005. p. 91-94. 1635213. (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC). doi: 10.1109/EDSSC.2005.1635213

The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs

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