Performance enhancement of boost converter based on PID controller plus linear-to-nonlinear translator

K. I. Hwu; Y. T. Yau

doi:10.1109/TPEL.2009.2036727

Performance enhancement of boost converter based on PID controller plus linear-to-nonlinear translator

K. I. Hwu
, Y. T. Yau

Department of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

60 Scopus citations

Abstract

Here, A PID controller plus a novel linear-to-nonlinear translator is proposed and applied to the boost converter to improve the operating performance of the boost converter under large transient variations in load all over the quiescent dc input voltage range. The proposed translator is inserted between the PID controller and the main power stage such that the PID controller considers the behavior of the boost converter to be quasi-linear, thereby suppressing the effect of nonlinear behavior of the boost converter on the PID controller. Besides, variations in dc gain of the control-to-output transfer function with the translator are smaller than those without the translator, thus making system control easy to attain. Also, one-comparator counter-based sampling without any AD converter is presented herein to realize the proposed control strategy. As mentioned above, the proposed control strategy can make the boost converter stably operated under large load transient responses all over the quiescent dc input voltage range.

Original language	English
Article number	5337893
Pages (from-to)	1351-1361
Number of pages	11
Journal	IEEE Transactions on Power Electronics
Volume	25
Issue number	5
DOIs	https://doi.org/10.1109/TPEL.2009.2036727
State	Published - 2010

Bibliographical note

Funding Information:
Manuscript received February 28, 2009; revised May 19, 2009 and August 15, 2009. Current version published May 7, 2010. This work was supported by the National Science Council under Grant NSC-97-2221-E-027-107. Recommended for publication by Associate Editor B. Choi.

Keywords

Boost converter
Field programmable gate array (FPGA)
Linear-to-nonlinear translator
One-comparator counterbased sampling
PID controller
Voltage conversion ratio
Without any A D converter (A DC)

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10.1109/TPEL.2009.2036727

Cite this

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title = "Performance enhancement of boost converter based on PID controller plus linear-to-nonlinear translator",

abstract = "Here, A PID controller plus a novel linear-to-nonlinear translator is proposed and applied to the boost converter to improve the operating performance of the boost converter under large transient variations in load all over the quiescent dc input voltage range. The proposed translator is inserted between the PID controller and the main power stage such that the PID controller considers the behavior of the boost converter to be quasi-linear, thereby suppressing the effect of nonlinear behavior of the boost converter on the PID controller. Besides, variations in dc gain of the control-to-output transfer function with the translator are smaller than those without the translator, thus making system control easy to attain. Also, one-comparator counter-based sampling without any AD converter is presented herein to realize the proposed control strategy. As mentioned above, the proposed control strategy can make the boost converter stably operated under large load transient responses all over the quiescent dc input voltage range.",

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N2 - Here, A PID controller plus a novel linear-to-nonlinear translator is proposed and applied to the boost converter to improve the operating performance of the boost converter under large transient variations in load all over the quiescent dc input voltage range. The proposed translator is inserted between the PID controller and the main power stage such that the PID controller considers the behavior of the boost converter to be quasi-linear, thereby suppressing the effect of nonlinear behavior of the boost converter on the PID controller. Besides, variations in dc gain of the control-to-output transfer function with the translator are smaller than those without the translator, thus making system control easy to attain. Also, one-comparator counter-based sampling without any AD converter is presented herein to realize the proposed control strategy. As mentioned above, the proposed control strategy can make the boost converter stably operated under large load transient responses all over the quiescent dc input voltage range.

AB - Here, A PID controller plus a novel linear-to-nonlinear translator is proposed and applied to the boost converter to improve the operating performance of the boost converter under large transient variations in load all over the quiescent dc input voltage range. The proposed translator is inserted between the PID controller and the main power stage such that the PID controller considers the behavior of the boost converter to be quasi-linear, thereby suppressing the effect of nonlinear behavior of the boost converter on the PID controller. Besides, variations in dc gain of the control-to-output transfer function with the translator are smaller than those without the translator, thus making system control easy to attain. Also, one-comparator counter-based sampling without any AD converter is presented herein to realize the proposed control strategy. As mentioned above, the proposed control strategy can make the boost converter stably operated under large load transient responses all over the quiescent dc input voltage range.

KW - Boost converter

KW - Field programmable gate array (FPGA)

KW - Linear-to-nonlinear translator

KW - One-comparator counterbased sampling

KW - PID controller

KW - Voltage conversion ratio

KW - Without any A D converter (A DC)

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ER -

Performance enhancement of boost converter based on PID controller plus linear-to-nonlinear translator

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Keywords

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