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Dual-path frequency compensation for current-mode buck converters

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

This paper proposes a dual-path frequency compensation (DPFC) for implementing on-chip error amplifier (EA). The DPFC uses two operation amplifiers to simultaneously charge and discharge a compensation capacitor. As a result, the equivalent capacitance is significantly multiplied with small additional power and silicon area. Since the slew rate of the EA is increased owing to the small compensation capacitance, the transient response of the buck converter is also enhanced dramatically. A laboratory converter with the DPFC is implemented with 0.35-μm CMOS process. Simulation results demonstrate the converter stability and transient response. The transient recovery time is less than 4 μs for load current changing from 500 mA to 50 mA. With the DPFC, the compensation capacitor is shrunk significantly and no compensation resistor is needed.

Original languageEnglish
Title of host publication2015 IEEE 11th International Conference on Power Electronics and Drive Systems, PEDS 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages432-436
Number of pages5
ISBN (Electronic)9781479944033
DOIs
StatePublished - 14 Aug 2015
Event11th IEEE International Conference on Power Electronics and Drive Systems, PEDS 2015 - Sydney, Australia
Duration: 9 Jun 201512 Jun 2015

Publication series

NameProceedings of the International Conference on Power Electronics and Drive Systems
Volume2015-August

Conference

Conference11th IEEE International Conference on Power Electronics and Drive Systems, PEDS 2015
Country/TerritoryAustralia
CitySydney
Period9/06/1512/06/15

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

Keywords

  • Frequency compensation
  • dc-dc converter
  • slew rat
  • transient response

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