TY - GEN
T1 - Applying a counter-based PFM control strategy to an FPGA-based SR forward converter
AU - Hwu, K. I.
AU - Yau, Y. T.
PY - 2006
Y1 - 2006
N2 - A field programmable gate arrays (FPGA) technique applied to a forward converter is presented to design a pulse-frequency-modulation (PFM) controller, along with protection peripherals. With only one comparator and without any analogue-to-digital converter (ADC), the information on the feedback output voltage is entirely obtained according to a counter. Besides, the control effort is calculated and used during the present period, thus causing the transient load response to be very fast. In this paper, the operation of this control topology is illustrated, along with some experimental results to demonstrate its effectiveness.
AB - A field programmable gate arrays (FPGA) technique applied to a forward converter is presented to design a pulse-frequency-modulation (PFM) controller, along with protection peripherals. With only one comparator and without any analogue-to-digital converter (ADC), the information on the feedback output voltage is entirely obtained according to a counter. Besides, the control effort is calculated and used during the present period, thus causing the transient load response to be very fast. In this paper, the operation of this control topology is illustrated, along with some experimental results to demonstrate its effectiveness.
UR - https://www.scopus.com/pages/publications/34547558776
U2 - 10.1109/TENCON.2006.344108
DO - 10.1109/TENCON.2006.344108
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AN - SCOPUS:34547558776
SN - 1424405491
SN - 9781424405497
T3 - IEEE Region 10 Annual International Conference, Proceedings/TENCON
BT - 2006 IEEE Region 10 Conference, TENCON 2006
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2006 IEEE Region 10 Conference, TENCON 2006
Y2 - 14 November 2006 through 17 November 2006
ER -